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1 for more information www.linear.com/LT3795 typical a pplica t ion fea t ures descrip t ion 110v led controller with spread spectrum frequency modulation the lt ? 3795 is a dc/dc controller designed to regulate a constant-current or constant-voltage and is ideal for driv- ing leds . it drives a low side external n-channel power mosfet from an internal regulated 7.7 v supply. the fixed frequency and current mode architecture result in stable operation over a wide range of supply and output voltages. spread spectrum frequency modulation ( ssfm) can be activated for improved electromagnetic compatibility ( emc) performance. the ground referred voltage fb pin serves as the input for several led protection features, and also al - lows the converter to operate as a constant- voltage source . the maximum output current is set by an external resistor, and the output current amplifier has a rail- to- rail common mode range. the LT3795 also includes a separate input current sensing amplifier that is used to limit input current. the tg pin inverts and level shifts the pwm signal to drive the gate of the external pmos. the pwm input provides led dimming ratios of up to 3000:1, and the ctrl inputs provide additional analog dimming capability. short-circuit robust boost led driver with spread spectrum frequency modulation a pplica t ions n 3000:1 true color pwm ? dimming n wide input voltage range: 4.5v to 110v n input and output current reporting n pmos switch driver for pwm and output disconnect n internal spread spectrum frequency modulation n 2% constant voltage regulation n 3% constant current regulation: 0 v v out 110 v n programmable input current limit n ctrl inputs linearly adjust led current n adjustable frequency: 100khz to 1mhz n programmable open led protection with openled flag n short-circuit protection and shortled flag n programmable under voltage lockout with hysteresis n soft-start with programmable fault restart timer n c/10 detection for battery charging n available in 28-lead tssop package n high power led, high voltage led n battery chargers n accurate current limited voltage regulators l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks and true color pwm is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7199560, 7321203, 7746300. efficiency vs v in v in (v) 0 90 100 30 50 3795 ta01b 85 80 10 20 40 60 75 70 95 efficiency (%) ivinpv in ivinn en/uvlo rt ismon ss v c openled shortled openled shortled 87v led 400ma LT3795 3795 ta01a ctrl1 ctrl2 pwm pwm v ref ivincomp ramp ovlo gnd fb isp isn tg intv cc intv cc intv cc gate sense 6.8nf 0.1f 0.1f 22h 15m 8v to 60v 110v (transient) 63v ovlo 31.6k 250khz 10k 4.7f 10nf 499k 2.2f 3 12.4k 115k v in 2.2f 4 13.3k 15m 620m 1m 6.8nf 100k 100k 3795fb LT3795
2 for more information www.linear.com/LT3795 p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in .......................................................................... 110 v en / u vlo ................................................................. 11 0 v isp , isn ................................................................... 11 0 v tg , gate ............................................................... note 2 ivinp , ivinn ............................................................ 11 0 v v in - ivinn ................................................... C0. 3 v to 4v intv cc ( note 3) ..................................... 8 .6 v, v in + 0.3 v pwm , shortled , openled ..................................... 12 v fb , r amp , ovlo ......................................................... 8 v ctrl 1, ctrl 2 ........................................................... 15 v se nse ...................................................................... 0. 5 v ismon , ivincomp ..................................................... 5 v v c , v ref , ss ................................................................ 3 v rt ............................................................................... 2 v operating junction temperature range ( note 4) lt 379 5 e/ lt 3795 i .................................. C 40 to 125 c lt 379 5h ................................................ C4 0 to 150 c storage temperature range ...................... C 65 to 150 c (note 1) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 top view fe package 28-lead plastic tssop 28 27 26 25 24 23 22 21 20 19 18 17 16 15 isp isn tg gnd ismon ctrl2 fb v c ctrl1 v ref ss rt ramp pwm ivincomp ivinp ivinn ovlo en/uvlo v in gnd gnd intv cc gate sense gnd openled shortled 29 gnd t jmax = 150c, ja = 30c/w, jc = 10c/w exposed pad ( pin 29) is gnd, must be soldered to pcb o r d er i n f or m a t ion e lec t rical c harac t eris t ics parameter conditions min typ max units v in minimum operating voltage v in tied to intv cc 4.5 v v in shutdown i q en/uvlo = 0v, pwm = 0v en/uvlo = 1.15v, pwm = 0 v 10 22 a a v in operating i q (not switching) r t = 82.5k to gnd, fb = 1.5v 2.9 3.5 ma v ref voltage C100a i ref 10a l 1.97 2.015 2.06 v v ref pin line regulation 4.5v < v in < 110v 1.5 m%/v v ref pin load regulation C100a i ref 0a 10 m%/a sense current limit threshold l 100 117 125 mv the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c , v in = 24v , en / uvlo = 24v , ctrl 1 = ctrl2 = 2v , pwm = 5v , unless otherwise noted. lead free finish tape and reel part marking* package description temperature range LT3795efe#pbf LT3795efe#trpbf LT3795fe 28-lead plastic tssop C40c to 125c LT3795ife#pbf LT3795ife#trpbf LT3795fe 28-lead plastic tssop C40c to 125c LT3795hfe#pbf LT3795hfe#trpbf LT3795fe 28-lead plastic tssop C40c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container . consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3795fb LT3795
3 for more information www.linear.com/LT3795 the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c , v in = 24v , en / uvlo = 24v , ctrl 1 = ctrl2 = 2v , pwm = 5v , unless otherwise noted. parameter conditions min typ max units sense input bias current current out of pin 65 a ss sourcing current ss = 0v 28 a ss sinking current isp C isn = 1v, ss = 2v 2.8 a error amplifier full scale led current sense threshold (v (isp-isn) ) isp = 48v, ctrl1 1.2v, ctrl2 1.2v isp = 0v, ctrl1 1.2v, ctrl2 1.2v l l 243 243 250 250 257 257 mv mv 9/10 th led current sense threshold (v (isp-isn) ) isp = 48v, ctrl1 = 1v, ctrl2 = 1.2v isp = 0v, ctrl1 = 1v, ctrl2 = 1.2v l l 220 220 225 225 230 230 mv mv 1/2 led current sense threshold (v (isp-isn) ) isp = 48v, ctrl1 = 0.6v, ctrl2 = 1.2v isp = 0v, ctrl1 = 0.6v, ctrl2 = 1.2v l l 119 119 125 125 130 130 mv mv 1/10 th led current sense threshold (v (isp-isn) ) isp = 48v, ctrl1 = 0.2v, ctrl2 = 1.2v isp = 0v, ctrl1 = 0.2v, ctrl2 = 1.2v l l 16 16 25 25 32 32 mv mv isp /isn current monitor v oltage (v ismon ) v ( isp- isn) = 250 mv, isp = 48v , C50a i ismon 0 a v ( isp- isn) = 250 mv, isp = 0v , C50a i ismon 0 a l l 0.96 0.96 1 1 1.04 1.04 v v isp /isn over current protection threshold (v (isp-isn) ) isn = 48v isn = 0v l l 360 360 375 375 390 390 mv mv ctrl1, ctrl2 input bias current current out of pin, ctrl = 1v 50 200 na isp/isn current sense amplifier input common mode range 0 110 v isp/isn input current bias current (combined) pwm = 5v (active), isp = 48v pwm = 0 v (standby), isp = 48v 700 0 0.1 a a isp/isn current sense amplifier g m v (isp-isn) = 250mv 350 s v c output impedance 2000 k v c standby input bias current pwm = 0v C20 20 na fb regulation voltage (v fb ) isp = isn = 48v isp = isn = 48v l 1.230 1.238 1.250 1.250 1.270 1.264 v v fb amplifier g m 600 s fb pin input bias current current out of pin, fb = v fb 40 200 na fb open led threshold openled falling, isp = isn = 48v v fb C 62mv v fb C 52mv v fb C 42mv v c/10 comparator threshold (v (isp-isn) ) openled falling, fb = 1.25v, isp = 48v openled falling, fb = 1.25v, isn = 0v 25 25 mv mv fb over voltage threshold tg rising v fb + 35mv v fb + 50mv v fb + 60mv v v c current mode gain (?v vc /?v sense ) 4.2 v/v fb shortled threshold shortled falling l 300 350 mv v c pin source current v c = 1.2v 10 a v c pin sink current v c = 1.2v, fb = 1.4v 30 a input current sense amplifier input current sense amplifier input voltage common range (v ivinp /v ivinn ) l 2.5 110 v input current sense threshold (v ivinp - v ivinn ) v ivinp = 48v, v in = 48v l 57 60 63 mv input current monitor v(ivincomp) v ivinp -v ivinn = 50mv, v in = 48v l 0.94 1 1.06 v input bias current (i(ivinn)) v ivinp -v ivinn = 50mv, v in = 48v 100 1000 na input current sense amplifier g m v ivinp -v ivinn = 60mv, v in = 48v 3400 s input step response (to 50% of output step) ?v sense = 60mv step, v in = 48v 1 s ivincomp pin resistance to gnd v in = 48v 15 k e lec t rical c harac t eris t ics 3795fb LT3795
4 for more information www.linear.com/LT3795 parameter conditions min typ max units linear regulator intv cc regulation voltage l 7.4 7.7 8 v dropout (v in - intv cc ) i intvcc = C10ma, v in = 4.5v 550 mv intv cc current limit v in = 110v, intv cc = 6v v in = 12v, intv cc = 6v 18 85 ma ma intv cc shutdown bias current if externally driven to 7v en/uvlo = 0v, intv cc = 7v 13 17 a intv cc undervoltage lockout 3.8 4 4.1 v intv cc undervoltage lockout hysteresis 200 mv oscillator switching frequency r t = 82.5k r t = 19.6k r t = 6.65k l l l 85 340 900 105 400 1000 125 480 1150 khz khz khz minimum off-t ime (note 5) 160 ns minimum on-time (note 5) 210 ns switching frequency modulation v ramp = 2v 70 % ramp input low threshold 1 v ramp input high threshold 2 v ramp pin source current ramp = 0.4v 12 a ramp pin sink current ramp = 1.6v 12 a logic input/outputs pwm input threshold rising l 0.96 1 1.04 v pwm pin bias current 10 a en/uvlo threshold voltage falling l 1.185 1.220 1.25 v en/uvlo rising hysteresis 20 mv en/uvlo input low voltage i vin drops below 10a 0.4 v en/uvlo pin bias current low en/uvlo = 1.15v 2.5 3 3.8 a en/uvlo pin bias current high en/uvlo = 1.30v 10 100 na openled output low i openled = 0.5ma 300 mv shortled output low i shortled = 0.5ma 300 mv ovlo threshold voltage rising l 1.215 1.25 1.28 v ovlo falling hysteresis 28 mv ovlo pin input current 150 na gate driver t r nmos gate driver output rise time c l = 3300pf, 10% to 90% 20 ns t f nmos gate driver output fall time c l = 3300pf, 10% to 90% 18 ns nmos gate output low (v ol ) 0.05 v nmos gate output high (v oh ) intv cc C 0.05 v t r top gate driver output rise time c l = 300pf 50 ns t f top gate driver output fall time c l = 300pf 100 ns top gate on voltage (v isp - v tg ) isp = 48v 7 8 v top gate off voltage (v isp - v tg ) pwm = 0v, isp = 48v 0 0.3 v e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c , v in = 24v , en / uvlo = 24v , ctrl 1 = ctrl2 = 2v , pwm = 5v , unless otherwise noted. 3795fb LT3795
5 for more information www.linear.com/LT3795 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: do not apply a positive or negative voltage source to tg and gate pins, otherwise permanent damage may occur. note 3: operating maximum for intv cc is 8v. note 4: the LT3795e is guaranteed to meet specified performance from 0c to 125c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT3795i is guaranteed to meet performance specifications over the C40c to 125c operating junction temperature range. the LT3795h is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 5: see duty cycle considerations in the applications information section. typical p er f or m ance c harac t eris t ics v (isp-isn) threshold vs fb voltage v fb vs temperature v (isp-isn) threshold vs v ctrl v (isp-isn) threshold vs v isp v (isp-isn) full-scale threshold vs temperature t a = 25c, unless otherwise noted. v (isp-isn) threshold at ctrl1 = 0.6v, ctrl2 = 1.2v vs temperature v ctrl (v) 0 200 300 0.6 1.0 3795 g01 150 100 0.2 0.4 0.8 1.2 1.4 50 0 250 v (isp-isn) threshold (mv) temperature (c) ?50 250 254 25 75 3795 g03 249 248 ?25 0 50 100 150125 247 246 253 252 251 v (isp-isn) threshold (mv) isp = 48v ctrl1= ctrl2 = 2v temperature (c) ?50 128 3795 g03a ?25 0 25 50 75 100 150125 127 125 124 126 122 123 v (isp-isn) (mv) v isp (v) 0 251 253 40 10080 3795 g02 250 249 20 60 120 248 247 252 v (isp-isn) threshold (mv) temperature (c) ?50 1.24 1.27 3795 g05 ?25 0 25 50 10075 150125 1.23 1.26 1.25 v fb (v) v fb (v) 1.1 150 300 3795 g04 100 1.15 1.2 1.25 1.3 50 0 250 200 v (isp-isn) threshold (mv) 3795fb LT3795
6 for more information www.linear.com/LT3795 typical p er f or m ance c harac t eris t ics r t vs switching frequency (khz) switching frequency vs temperature quiescent current vs v in v ismon vs v (isp-isn) isp/isn input bias current vs v isp , v isn v ref voltage vs temperature v ref vs v in t a = 25c, unless otherwise noted. isp/isn overcurrent protection threshold vs temperature v (isp-isn) (mv) 0 1200 1000 1400 2000 3795 g13 100 200 300 400 500 800 600 400 200 0 1600 1800 v ismon (mv) temperature (c) ?50 400 390 410 440 3795 g11 0?25 25 50 75 100 150125 380 370 360 420 430 switching frequency (khz) r t = 19.6k switching frequency (khz) 0 3795 g10 400300200100 500 600 700 800 900 1000 100 10 1 r t (k) v in (v) 0 2.01 2.00 2.02 2.05 3795 g09 4020 60 80 120100 1.99 1.98 1.97 2.03 2.04 v ref (v) v in (v) 0 1.0 1.5 2.0 3.0 3795 g12 4020 100 60 80 120 0.5 0 2.5 v in current (ma) switching frequency vs ss voltage ss voltage (mv) 0 450 3795 g11a 200 400 600 800 1000 1200 350 400 250 200 300 150 0 50 100 switching frequency (khz) r t = 19.6k temperature (c) ?50 374 372 380 3795 g06 ?25 0 25 50 10075 150125 370 378 376 isp/isn overcurrent threshold (mv) v isp , v isn (v) 0 500 3795 g07 20 40 60 12010080 400 300 200 100 0 800 900 700 600 isp, isn bias current (a) isp isn temperature (c) ?50 2.01 2.00 2.05 3795 g08 ?25 0 25 50 10075 125 150 1.99 1.98 1.97 1.96 2.04 2.03 2.02 v ref (v) i ref = 0a i ref = ?100a 3795fb LT3795
7 for more information www.linear.com/LT3795 typical p er f or m ance c harac t eris t ics en/uvlo hysteresis current vs temperature t a = 25c, unless otherwise noted. en/uvlo falling/rising threshold vs temperature sense current limit threshold vs temperature temperature (c) ?50 1.25 1.24 1.28 3795 g15 ?25 0 25 50 75 100 150125 1.23 1.22 1.21 1.20 1.19 1.26 1.27 en/uvlo (v) en/uvlo rising threshold en/uvlo falling threshold temperature (c) ?50 115 114 118 3795 g16 ?25 0 25 50 75 100 125 150 113 112 111 110 109 108 116 117 sense threshold (mv) temperature (c) ?50 2.0 1.5 3.5 3795 g14 ?25 0 25 50 75 100 150125 1.0 0.5 0 2.5 3.0 en/uvlo hysteresis current (a) intv cc current limit vs temperature intv cc vs v in intv cc dropout voltage vs current, temperature intv cc vs temperature intv cc current limit vs v in temperature (c) ?50 70 80 100 3795 g19 0?25 25 50 75 150 100 125 60 50 90 intv cc current limit (ma) v in = 24v v in = 48v intv cc load (ma) 0 1800 v in = 6v 3795 g21 5 10 15 20 125c 25c ?55c 1600 1400 1200 1000 800 600 400 200 0 intv cc dropout (mv) 150c 75c 0c ?40c v in (v) 0 40 60 120 3795 g18 4020 60 80 120100 20 0 80 100 intv cc current limit (ma) v in (v) 0 9 3795 g20 2010 30 40 50 60 70 80 90 110100 7 8 6 5 4 3 2 1 0 intv cc (v) temperature (c) ?50 3795 g22 ?25 0 5025 75 125100 150 7.9 8.0 7.8 7.7 7.6 7.5 7.4 7.3 intv cc (v) sense current limit threshold vs duty cycle duty cycle (%) 0 120 115 3795 g17 20 40 60 80 100 110 105 100 sense threshold (mv) 3795fb LT3795
8 for more information www.linear.com/LT3795 v (ivinp-ivinn) threshold vs temperature typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. top gate (pmos) rise/fall time vs capacitance v ivincomp vs v (ivinp-ivinn) ramp pin sourcing and sinking current vs temperature nmos gate rise/fall time vs capacitance v (ivinp-ivinn) threshold vs v in top gate driver rising edge v in (v) 0 65 64 3795 g24 20 40 60 80 100 120 63 62 61 60 59 58 57 56 55 v (ivinp-ivinn) (mv) v (ivinp-ivinn) (mv) 0 1.8 3795 g25 20 40 60 80 1.4 1.6 0.8 0.6 1.2 1.0 0.4 0 0.2 v ivincomp (v) v in = 24v top gate driver falling edge capacitance (nf) 0 160 3795 g27 10 20 30 40 50 120 140 80 60 100 40 0 20 time (ns) rise time fall time capacitance (nf) 0 800 3795 g28 1 2 3 4 5 6 7 8 9 10 600 700 400 300 500 200 0 100 time (ns) fall time rise time pmos vishay siliconix si7113dn 3795 g29 100ns/div 5v pwm tg 0v 85v 75v temperature (c) ?50 65 64 63 3795 g23 ?25 0 25 50 75 100 150125 62 61 60 59 58 57 56 55 v (ivinp-ivinn) (mv) v in = 24v temperature (c) ?50 13 3795 g26 5025 ?25 0 75 100 125 150 12 11 10 8 9 current (a) sinking sourcing pmos vishay siliconix si7113dn 3795 g30 100ns/div 5v pwm tg 0v 85v 75v 3795fb LT3795
9 for more information www.linear.com/LT3795 p in func t ions isp (pin 1): connection point for the positive terminal of the current feedback resistor (r led ). also serves as positive rail for tg pin driver. isn (pin 2): connection point for the negative terminal of the current feedback resistor (r led ). tg (pin 3): top gate driver output. an inverted pwm signal drives the gate of a series pmos device between v isp and (v isp C 7 v) if v isp > 7 v. an internal 7 v clamp protects the pmos gate by limiting vgs. leave tg uncon- nected if not used. gnd ( pins 4, 17, 21, 22, exposed pad pin 29): ground. these pins also serve as current sense input for control loop, sensing the negative terminal of the current sense resistor in the source of the n-channel mosfet. solder the exposed pad directly to the ground plane. ismon (pin 5): isp/isn current report pin. the led current sensed by isp/isn inputs is reported as v ismon = i led ? r led ? 4. leave ismon pin unconnected if not used. when pwm is low, ismon is driven to ground. bypass with a 47nf capacitor or higher if needed. ctrl2 (pin 6): current sense threshold adjustment pin 2. this pin has identical functions as ctrl1. the v (isp-isn) threshold is regulated by the internal 1.1 v refer- ence voltage , ctrl1 or ctrl2. whichever is the lowest takes precedence. regulating threshold v (isp-isn) is 0.25 ? v ctrlx less an offset for 0.1v < v ctrlx < 1 v. for v ctrlx > 1.2 v the current sense threshold is constant at the full- scale value of 250 mv. for 1v < v ctrlx < 1.2 v, the dependence of the current sense threshold upon v ctrlx transitions from a linear function to a constant value, reaching 98% of full-scale value by v ctrlx = 1.1 v. connect ctrl1 and ctrl2 to v ref for the 250 mv default current threshold. do not leave this pin open. connect either ctrl pin to gnd for zero led current. fb (pin 7): voltage loop feedback pin. fb is intended for constant-voltage regulation or for led protection/open led detection. the internal transconductance amplifier with output v c regulates fb to 1.25v ( nominal) through the dc/dc converter. if the fb input is regulating the loop, and v (isp-isn) is less than 25mv ( typical), the openled pull-down is asserted. this action may signal an open led fault. if fb is driven above the 1.3v ( by an external power supply spike, for example), the gate pin is pulled low to turn off the external n-channel mosfet and the tg pin is driven high to protect the leds from an overcurrent event. do not tie this pin to gnd as the shortled will be asserted and the part will be shut down. v c (pin 8): transconductance error amplifier output pin. used to stabilize the control loop with an rc network. this pin is high impedance when pwm is low, a feature that stores the demand current state variable for the next pwm high transition. connect a capacitor between this pin and gnd; a resistor in series with the capacitor is recommended for fast transient response. do not leave this pin open. ctrl1 (pin 9): current sense threshold adjustment pin 1. this pin has an identical function as ctrl2. please refer to the ctrl2 pin description. v ref (pin 10): voltage reference output pin. typically 2.015v. this pin drives a resistor divider for the ctrl pins, either for analog dimming or for temperature limit/ compensation of the led load. it can supply up to 100a. ss (pin 11): soft-start pin. this pin modulates oscillator frequency and compensation pin voltage (v c ) clamp. the soft-start interval is set with an external capacitor . the pin has a 28a ( typical) pull-up current source to an internal 2.5v rail. this pin can be used as fault timer. provided the ss pin has exceeded 1.7v to complete a blanking period at start-up, the pull-up current source is disabled and a 2.8a pull-down current enabled when any one of the following fault conditions happen: 1. led over current (isp-isn > 0.375v) 2. int v cc undervoltage 3. output short (fb < 0.3v after start-up) 4. thermal limit the ss pin must be discharged below 0.2 v to reinitiate a soft-start cycle. switching is disabled until ss begins to recharge. it is important to select a capacitor large enough that fb can exceed 0.3 v under normal load conditions before ss exceeds 1.7v. do not leave this pin open. rt (pin 12): switching frequency adjustment pin. set the frequency using a resistor to gnd ( for resistor values, see the typical performance curve or table 2). do not leave the rt pin open. 3795fb LT3795
10 for more information www.linear.com/LT3795 p in func t ions ramp ( pin 13): the ramp pin is used for spread spectrum frequency modulation. the internal switching frequency is spread out to 70% of the original value, where the modulation frequency is set by 12a/(2 ? 1v ? c ramp ). if not used, tie this pin to gnd. pwm (pin 14): pwm input signal pin. a low signal turns off switching, idles the oscillator, disconnects the v c pin from all internal loads, and drives tg to the isp level. pwm has an internal 500 k pull-down resistor. if not used, connect to v ref . shortled (pin 15): an open-collector pull-down on shortled asserts when any of the following conditions happen: 1. fb < 0.3v after ss pin reaches 1.7v at start-up. 2. led overcurrent (v (isp-isn) > 375mv). to function, the pin requires an external pull-up resistor. shortled status is only updated during pwm high state and latched during pwm low state. shortled remains asserted until the ss pin is discharged below 0.2v. openled ( pin 16): an open- collector pull- down on openled asserts if the fb input is above 1.20v (typical), and v (isp-isn) is less than 25mv (typical). to function, the pin requires an external pull-up resistor. openled status is updated only during pwm high state and latched during pwm low state. sense (pin 18): the current sense input for the control loop. kelvin connect this pin to the positive terminal of the switch current sense resistor, r sense , in the source of the n-channel mosfet. the negative terminal of the current sense resistor should be kelvin connected to the gnd plane of the ic. gate (pin 19): n-channel mosfet gate driver output. switches between intv cc and gnd. it is driven to gnd during shutdown, fault or idle states. intv cc (pin 20): regulated supply for internal loads and gate driver. supplied from v in and regulates to 7.7v (typical). intv cc must be bypassed with a 4.7 f capacitor placed close to the pin. connect intv cc directly to v in if v in is always less than or equal to 8v. v in ( pin 23): input supply pin. must be locally bypassed with a 0.22f ( or larger) capacitor placed close to the ic. en/uvlo (pin 24): enable and undervoltage lockout pin. an accurate 1.22 v falling threshold with externally programmable hysteresis detects when power is ok to enable switching. rising hysteresis is generated by the external resistor divider and an accurate internal 3a pull-down current. above the threshold, en/uvlo input bias current is sub-a. below the falling threshold, a 3 a pull-down current is enabled so the user can define the hysteresis with the external resistor selection. an under - voltage condition resets soft-start. tie to 0.4 v, or less, to disable the device. ovlo (pin 25): input overvoltage lockout pin. an ac - curate 1.25 v rising threshold detects when power is ok to enable switching. ivinn (pin 26): connection point for the negative terminal of the input current sense resistor (r insns ). the input current can be programmed by i in = 60mv/r insns . ivinp (pin 27): connection point for the positive terminal of the input current sense resistor. ivincomp (pin 28): input current sense amplifier output pin. the voltage at ivincomp pin is proportional to i in as v ivincomp = i in ? r insns ? 20. a 10 nf or larger capacitor to gnd is required at this pin to compensate the input current loop. do not leave this pin open, and do not load this pin with a current. 3795fb LT3795
11 for more information www.linear.com/LT3795 b lock diagra m en/uvlo short-circuit detect fb v c ismon a1 a2 1.22v 1.5v scilm 2.5v v led gm eamp 3a pwm comparator tgoffb 1.25v isp isp-7v shdn 1.25v isn 1.1v 100mv ? + ? + + + + ? ? + + ? 1.2v ctrl1 ctrl2 isp ss and logic tgoffb faultb scilm ss thermal shdn pwm 10a at fb = 1.25v gm tg 4 ? + a4 a5 a6 gm a8 1 +? 10a at a6 + = a6 ? 10a 10a at ivincomp = 1.2v 2.8a 1ma 28a ivinp r1 r2 = r1 ivinn + ? a11 ivincomp 5.5v r3 = r1 20 shortled scilm intv cc ovfb vinov ss rt ramp 3796 bd ? + a7 ? + ramp generator 100khz to 1mhz oscillator pwm v in intv cc v ref faultb driver i sense ? + i lim 7.7v sense gnd gate ldo + ? a3 q r s ovlo ovfb comparator + ? 1.20v fb 1.25v a17 a16 a21 a7 ? + 200mv 100a 2.015v v led intv cc intv cc c/10 comparator with 200mv hysteresis a7 ? + a14 a10 + ? a18 a9 a15 2v 12a 12a a7 1v a7 openled 2.5v 113mv fb + ? 1.3v + ? 0.3v fb en ? + s qr ? + a19 a20 pwm 3795fb LT3795
12 for more information www.linear.com/LT3795 o pera t ion the LT3795 is a constant- frequency, current mode con - troller with a low side nmos gate driver. the operation of the LT3795 is best understood by referring to the block diagram of the ic. in normal operation, with the pwm pin low, the gate pin is driven to gnd, the tg pin is pulled high to isp to turn off the pmos disconnect switch, the v c pin goes high impedance to store the previous switch - ing state on the external compensation capacitor, and the isp and isn pin bias currents are reduced to leakage levels. when the pwm pin transitions high, the tg pin transitions low after a short delay. at the same time, the internal oscillator wakes up and generates a pulse to set the pwm latch, turning on the external power n- channel mosfet switch ( gate goes high). a voltage input propor - tional to the switch current, sensed by an external current sense resistor between the sense and gnd input pins, is added to a stabilizing slope compensation ramp and the resulting switch current sense signal is fed into the negative terminal of the pwm comparator. the current in the external inductor increases steadily during the time the switch is on. when the switch current sense voltage exceeds the output of the error amplifier, labeled v c , the latch is reset and the switch is turned off. during the switch off phase, the inductor current decreases. at the completion of each oscillator cycle, internal signals such as slope compensation return to their starting points and a new cycle begins with the set pulse from the oscillator. through this repetitive action, the pwm control algorithm establishes a switch duty cycle to regulate a current or voltage in the load. the v c signal is integrated over many switching cycles and is an amplified version of the differ - ence between the led current sense voltage, measured between isp and isn, and the target difference voltage set by the ctrl1 or ctrl2 pin. in this manner, the error amplifier sets the correct peak switch current level to keep the led current in regulation. if the error amplifier output increases, more current is demanded in the switch; if it decreases, less current is demanded. the switch current is monitored during the on phase and the voltage across the sense pin is not allowed to exceed the current limit threshold of 113 mv ( typical). if the sense pin exceeds the current limit threshold, the sr latch is reset regardless of the output state of the pwm comparator. likewise, any fault condition, i.e . fb overvoltage ( fb > 1.3v ), output short ( fb < 0.3v ) after start- up, input overvoltage ( ovlo > 1.25v ) led overcurrent, or intv cc undervoltage ( intv cc < 4v ), the gate pin is pulled down to gnd immediately. in voltage feedback mode, the operation is similar to that described above, except the voltage at the v c pin is set by the amplified difference of the internal reference of 1.25v ( nominal) and the fb pin. if fb is lower than the reference voltage, the switch current increases; if fb is higher than the reference voltage, the switch demand current decreases. the led current sense feedback interacts with the voltage feedback so that fb does not exceed the internal reference and the voltage between isp and isn does not exceed the threshold set by either of the ctrl pins. for accurate current or voltage regulation, it is necessary to be sure that under normal operating conditions, the appropriate loop is domi - nant. to deactivate the voltage loop entirely, fb can be set between 0.4 v and 1 v through a resistor network to v ref pin. to deactivate the led current loop entirely, the isp and isn should be tied together and ctrl1 and ctrl2 tied to v ref . tw o led specific functions featured on the LT3795 are controlled by the voltage feedback fb pin. first, when the fb pin exceeds a voltage 52mv lower (C4%) than the fb regulation voltage and v (isp-isn) is less than 25mv ( typi- cal), the pull-down driver on the openled pin is activated. this function provides a status indicator that the load may be disconnected and the constant-voltage feedback loop is taking control of the switching regulator. when the fb pin drops below 0.3 v after start-up, the shortled pin is asserted by comparator a16. a blanking period occurs during start-up for the shortled protection feature from the en/uvlo toggle until the ss pin reaches 1.7v. LT3795 features a pmos disconnect switch driver. the pmos disconnect switch can be used to improve the pwm dimming ratio, and operate as fault protection as well. once a fault condition is detected, the tg pin is pulled high to turnoff the pmos switch. the action isolates the led array from the power path, preventing excessive current from damaging the leds. a standalone input current sense amplifier is integrated in the LT3795. the input current sense amplifier a11 senses the input current and converts it to a voltage signal at the ivincomp pin. when the voltage potential at the ivincomp pin moves close to 1.2 v, the amplifier a8 starts to interact with the v c pin, and thus reduces the regulated led cur- rent. in this way, the input current is limited. 3795fb LT3795
13 for more information www.linear.com/LT3795 intv cc regulator bypassing and operation the intv cc pin requires a capacitor for stable operation and to store the charge for the large gate switching cur- rents. choose a 10 v rated low esr, x7r or x5r ceramic capacitor for best performance. a 4.7 f ceramic capacitor is adequate for many applications. place the capacitor close to the ic to minimize the trace length to the intv cc pin and also to the ic ground. an internal current limit on the intv cc output protects the LT3795 from excessive on-chip power dissipation. the minimum value of this current limit should be considered when choosing the switching n-channel mosfet and the operating frequency. i intvcc can be calculated from the following equation: i intvcc = q g ? f osc careful choice of a lower q g mosfet allows higher switching frequencies, leading to smaller magnetics. the intv cc pin has its own undervoltage disable ( uvlo) set to 4 v ( typical) to protect the external fets from excessive power dissipation caused by not being fully enhanced. if the intv cc pin drops below the uvlo threshold, the gate pin is forced to 0 v, tg pin is pulled high and the soft- start pin will be reset . if the input voltage, v in , will not exceed 8 v , then the intv cc pin should be connected to the input supply. be aware that a small current ( typically 13a ) loads the intv cc in shutdown. if v in is normally above, but occasionally drops below the intv cc regulation voltage, then the minimum operating v in is close to 4.5v . this value is determined by the dropout voltage of the linear regulator and the 4 v intv cc undervoltage lockout threshold mentioned above. programming the turn-on and turn-off thresholds with the en/uvlo pin the falling uvlo value can be accurately set by the resistor divider. a small 3 a pull-down current is active when en/ uvlo is below the threshold. the purpose of this current is to allow the user to program the rising hysteresis. the following equations should be used to determine the values of the resistors: v in(falling) = 1.22 ? r1 + r2 r2 v in(rising) = v in(falling) + 3a ? r 1 a pplica t ions i n f or m a t ion programming the overvoltage lockout threshold with the ovlo pin the input overvoltage lockout protection feature can be implemented by a resistor from the v in to ovlo pins as shown in figure 2. the following equations should be used to determine the values of the resistors: v in,ovlo = 1.25 ? r3 + r4 r4 led current programming the led current is programmed by placing an appropriate value current sense resistor r led between the isp and isn pins. for best fault protection provided by the high side pmos disconnect switch, sensing of the current should be done at the top of the led string. if this option is not available, then the current may be sensed at the bottom of the string. both the ctrl pins should be tied to a volt - age higher than 1.2 v to get the full-scale 250mv (typical) threshold across the sense resistor. either ctrl pin can also be used to dim the led current to zero, although relative accuracy decreases with the decreasing voltage sense threshold. the two ctrl pins have identical func - tions. whichever is the lowest takes precedence. when the lower ctrl pin voltage is less than 1 v, the led current is: i led = v ctrl ? 100mv r led ? 4 , 0.1v< v ctrl < 1v i led = 0, v ctrl = 0v figure 1. figure 2. LT3795 3795 f01 en/uvlo r1 r2 v in LT3795 3795 f02 ovlo r3 r4 v in 3795fb LT3795
14 for more information www.linear.com/LT3795 when the lower ctrl pin voltage is between 1 v and 1.2v, the led current varies with ctrl, but departs from the previous equation by an increasing amount as the ctrl voltage increases. ultimately above 1.2 v, the led current no longer varies with ctrl. the typical v ( isp - isn) threshold vs ctrl is listed in table 1. table 1. v (isp-isn) threshold vs ctrl v ctrl (v) v (isp-isn) (mv) 1 225 1.05 236 1.1 244.5 1.15 248.5 1.2 250 when both the ctrl pins are higher than 1.2 v, the led current is regulated to: i led = 250mv r led the ctrl pins should not be left open ( tie to v ref if not used). either ctrl pin can also be used in conjunction with a thermistor to provide overtemperature protection for the led load, or with a resistor divider to v in to reduce output power and switching current when v in is low. the presence of a time varying differential voltage signal (ripple) across isp and isn at the switching frequency is expected. the amplitude of this signal is increased by high led load current, low switching frequency and/or a smaller value output filter capacitor. for best accuracy, the amplitude of this ripple should be less than 25mv. programming output voltage (constant-voltage regulation) and output voltage open led and shorted led thresholds the LT3795 has a voltage feedback pin fb that can be used to program a constant-voltage output. in addition, fb programming determines the output voltage that will cause openled and shortled to assert. for a boost led driver, the output voltage can be programmed by selecting the values of r5 and r 6 ( see figure 3) according to the following equation: v out = 1.25 ? r5 + r6 r6 figure 3. feedback resistor connections for boost and sepic applications figure 4. feedback resistor connection for buck mode or buck-boost mode led driver a pplica t ions i n f or m a t ion LT3795 3795 f03 fb r5 r6 v out LT3795 3795 f04 r8 q1 r7 led array v out fb r sense ? + for an led driver of buck mode or a buck-boost mode configuration, the fb voltage is typically level shifted to a signal with respect to gnd as illustrated in figure 4. the output can be expressed as: v out = 1.25 ? r7 r8 + v be(q1) if the open led clamp voltage is programmed correctly using the resistor divider, then the fb pin should never exceed 1.2v when leds are connected. to detect both open-circuit and short-circuit conditions at the output, the LT3795 monitors both output voltage and current. when fb exceeds v fb - 52mv, openled is asserted if v (isp-isn) is less than 25mv. openled is de- asserted when v (isp-isn) is higher than 70mv ( typical) or fb drops below v fb - 62mv (typical). the shortled pin is asserted if v (isp-isn) > 375 mv or the fb pin falls below 300mv ( typical) after initial start-up and ss reaches 1.7 v. the ratio between the fb openled threshold of 1.2 v and the shortled threshold of 0.3v can limit the range of v out . the range of v out using the maximum shortled threshold of 0.35 v is 3.5:1. the range of v out can be made wider using the circuits shown 3795fb LT3795
15 for more information www.linear.com/LT3795 in figure 5 and figure 6. for a v out range that is greater than 8:1, consult factory applications. a pplica t ions i n f or m a t ion figure 6. feedback resistor connection for wide range output in buck mode and buck-boost mode applications figure 5. feedback resistor connection for wide range output in boost and sepic applications LT3795 3795 f05 fb r10 r11 r12 v out v ref step 3: r11 = 1000 1.7 (1.65) 91.4 ?(0.8) 18.3 ? 1.7 = 12.64, use r11 = 12.7k r12 = 1000 1.7 (0.35) 91.4 ?(1.2) 18.3 = 169k the resistor values for r14 and r15 in figure 6 can be calculated as shown below. see the example that follows for a suggested r13 value. r14 = r13 ? 1.7 1.65 ? v h out ? 0.8 ? v l out ? 0.85 ? v be (q1) r15 = r13 ? 1.7 0.35 ? v h out ? 1.2 ? v l out + 0.85 ? v be (q1) example : calculate the resistor values required to in- crease the v out range of a buck-boost mode led driver to 7.5:1 and have openled occur when v out is 43.5v. use v be (q1) = 0.7v: step 1: choose r13 = 357k step 2: v l out = 43.5/7.5 = 5.8 step 3: r14 = 357 1.7 (1.65) 43.5 ?(0.8) 5.8 ?(0.85) 0.7 = 9.12, use r14 = 9.09k r15 = 357 1.7 (0.35) 43.5 ?(1.2) 5.8 + (0.85) 0.7 = 68.5, use r15 = 68.1k led overcurrent protection feature the isp and isn pins have a short- circuit protection feature independent of the led current sense feature. this feature prevents the development of excessive switching currents and protects the power components. the short-circuit protection threshold (375 mv, typ) is designed to be 50% higher than the default led current sense threshold. once the led overcurrent is detected, the gate pin is driven to gnd to stop switching, tg pin is pulled high to disconnect the led array from the power path, and fault protection is initiated via the ss pin. LT3795 3795 f06 fb r13 + ? r14 r15 q1 led array v ref v out r sense the equations to widen the range of v out are derived using a shortled threshold of 0.35 v, an openled threshold of 1.2 v and a reference voltage v ref of 2 v. the resistor values for r11 and r12 in figure 5 can be calculated as shown below. see the example that follows for a sug - gested r10 value. r11 = r10 ? 1.7 1.65 ? v h out ? 0.8 ? v l out ? 1.7 r12 = r10 ? 1.7 0.35 ? v h out ? 1.2 ? v l out example: calculate the resistor values required to increase the v out range of a boost led driver to 5:1 and have openled occur when v out is 91.4v: step 1: choose r10 = 1m step 2: v l out = 91.4/5 = 18.3 3795fb LT3795
16 for more information www.linear.com/LT3795 figure 7. the simplified led short-circuit protection schematic for boost or buck-boost mode converter figure 9. the simplified led short-circuit protection schematic for buck mode converter figure 8. short-circuit current a pplica t ions i n f or m a t ion LT3795 3795 f07 r sns r led led + gnd (boost) or v in (buck-boost mode) led string d2 isp gate sense v in v in c1 m1 m2 isn tg c2 l1 d1 LT3795 3795 f09 led string tg isp isn v in v in r led r sns d3 gate sense d1 d2 led + led ? l1 m1 m2 c2 c1 a typical led short- circuit protection scheme for a boost or buck- boost mode converter is shown in figure 7. the schottky or ultrafast diode d 2 should be put close to the drain of m 2 on the board. it protects the led + node from swinging well below ground when being shorted to ground through a long cable. usually, the internal protection loop takes about 100ns to respond as shown in figure 8. refer to the short- circuit robust boost led driver with input current limit and spread spectrum frequency modulation application circuit for the test schematic . note that the impedance of the short- circuit cable affects the peak current. schottky or ultrafast recovery diodes d2 and d3 are recommended to protect against a short circuit for the buck mode circuit shown in figure 9. pwm dimming control for brightness there are two methods to control the led current for dim - ming using the LT3795. one method uses the ctrl pins to adjust the current regulated in the leds. a second method uses the pwm pin to modulate the led current between zero and full current to achieve a precisely programmed average current, without the possibility of color shift that occurs at low current in leds. to make pwm dimming more accurate, the switch demand current is stored on the v c node during the quiescent phase when pwm is low. this feature minimizes recovery time when the pwm signal goes high. to further improve the recovery time, a disconnect switch should be used in the led current path to prevent the output capacitor from discharging during the pwm signal low phase. the minimum pwm on or off time depends on the choice of operating frequency set by the rt input. for best current accuracy, the minimum pwm high time should be at least three switching cycles (3s for f sw = 1mhz). a low duty cycle pwm signal can cause excessive start-up times if it were allowed to interrupt the soft- start sequence. therefore, once start-up is initiated by pwm > 1 v, the LT3795 will ignore a logical disable by the external pwm input signal . the device will continue to soft-start with switching and tg enabled until either the voltage at ss reaches the 1.0 v level, or the output current reaches one- fourth of the full-scale current. at this point the device will i m2 5a/div shortled 5v/div 3795 f08 500ns/div led + 50v/div 3795fb LT3795
17 for more information www.linear.com/LT3795 a pplica t ions i n f or m a t ion begin following the dimming control as designated by pwm . if at any time an output overcurrent is detected, gate and tg will be disabled even as ss continues to charge. programming the switching frequency the rt frequency adjust pin allows the user to program the switching frequency from 100 khz to 1 mhz to optimize efficiency/ performance or external component size. higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. lower frequency operation gives better performance at the cost of larger external component size. for an appropriate r t resistor value see table 2. an external resistor from the rt pin to gnd is requireddo not leave this pin open. table 2. typical switching frequency vs r t value (1% resistor) f osc (khz) r t (k) 1000 6.65 900 7.50 800 8.87 700 10.2 600 12.4 500 15.4 400 19.6 300 26.1 200 39.2 100 82.5 spread spectrum frequency modulation switching regulators can be particularly troublesome for applications where electromagnetic interference ( emi) is a concern. to improve the emi performance, the LT3795 includes a spread spectrum frequency feature. if there is a capacitor (c ramp )at the ramp pin, a triangle wave sweeping between 1 v and 2 v is generated. this signal is then fed into the internal oscillator to modulate the switch - ing frequency between 70% of the base frequency and the base frequency, which is set by the r t resistor. the modulation frequency is set by 12a/(2 ? 1v ? c ramp ). figure 10 shows the noise spectrum comparison between a conventional boost switching converter (with the LT3795 ramp pin tied to gnd) and a spread spectrum modulation enabled boost switching converter with 6.8 nf at the ramp pin ( refer to the boost led driver with input current limit and spread spectrum frequency modulation application circuit). the results of emi measurements are sensitive to the ramp frequency selected with the capacitor . 1khz is a good starting point to optimize peak measurements, but some fine tuning of this selection may be necessary to get the best overall emi results in a particular system. consult factory applications for more detailed information about emi reduction. (10b) conducted peak emi comparison figure 10. (10a) conducted average emi comparison frequency (khz) 500 60 50 30 20 10 90 3796 f10a 1300 900 1700 2100 2500 40 0 70 80 peak amplitude (dbv) spread spectrum enabled spread spectrum disabled frequency (khz) 500 60 50 30 20 10 90 3796 f10b 1300 900 1700 2100 2500 40 0 70 80 peak amplitude (dbv) spread spectrum enabled spread spectrum disabled duty cycle considerations switching duty cycle is a key variable defining converter operation, therefore, its limits must be considered when programming the switching frequency for a particular application. the fixed minimum on-time and minimum 3795fb LT3795
18 for more information www.linear.com/LT3795 figure 12. setting input current limit off-time ( see figure 11) and the switching frequency de- fine the minimum and maximum duty cycle of the switch, respectively. the following equations express the mini- mum/ maximum duty cycle: minimum duty cycle = minimum on-time ? switching frequency maximum duty cycle = 1 C minimum off- time ? switching frequency filter capacitor c filt shown in figure 12 filters the voltage at the ivincomp pin to minimize ripple due to the input current. c filt also compensates the input current regula- tion loop , and is selected based on the loop response in addition to the intended voltage ripple on ivincomp . the ivincomp pin resistance to ground and c filt form a second pole in the input current regulation loop in addition to the dominant pole at v c pin. suggested values for c filt of 10nf - 0.1 f will usually provide a second pole in the input current regulation loop that results in stable loop response and is equivalent to the second pole in the isp/ isn regulation loop, which consists of the output capacitance c out and the dynamic resistance of the led load. for buck mode applications, filter components, r in( opt ) and c opt , can be placed close to lt 3795 to suppress substantial transient signal or noise at the ivinn and ivinp pins. for boost and buck-boost mode applications, r in( opt ) and c opt are not required. thermal considerations the LT3795 is rated to a maximum input voltage of 110 v. careful attention must be paid to the internal power dis - sipation of the ic at higher input voltages to ensure that a junction temperature of 150 c is not exceeded. this junction limit is especially important when operating at high ambient temperatures. the majority of the power dis - sipation in the ic comes from the supply current needed to a pplica t ions i n f or m a t ion LT3795 3795 f12 r insns r in(opt) ivinn c filt ivinp to load v in i in ivincomp c opt when calculating the operating limits, the typical values for on/off-time in the data sheet should be increased by at least 100 ns to allow margin for pwm control latitude, gate rise/fall times and sw node rise/fall times. setting input current limit the LT3795 has a standalone input current sense amplifier to limit the input current. the input current i in shown in figure 12 is converted to a voltage output at the ivincomp pin. when the ivincomp voltage exceeds 1.2 v the gate is pulled low, and the converter stops switching. the input current limit is calculated as follows: i in = 60mv r insns figure 11. typical minimum on- and off-time vs temperature temperature (c) ?50 200 150 50 350 3796 f11 0?25 25 50 75 125100 150 100 0 250 300 time (ns) minimum on-time minimum off-time 3795fb LT3795
19 for more information www.linear.com/LT3795 a pplica t ions i n f or m a t ion drive the gate capacitance of the external power n-channel mosfet. this gate drive current can be calculated as: i gate = f sw ? q g a low q g power mosfet should always be used when operating at high input voltages, and the switching fre- quency should also be chosen carefully to ensure that the ic does not exceed a safe junction temperature. the internal junction temperature, t j of the ic can be estimated by: t j = t a + [v in ? (i q + f sw ? q g ) ? ja ] where t a is the ambient temperature, i q is the quiescent current of the part (2.9 ma typical) and ja is the package thermal impedance (30 c/w for the tssop package). for example, an application with t a(max) = 85 c, v in(max) = 60v, f sw = 400 khz, and having a n-channel mosfet with q g = 20 nc, the maximum ic junction temperature will be approximately: t j = 85c + [60v ? (2.9ma + 400khz ? 20nc) ? 30 c/w] 104.6c the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should then be connected to an internal copper ground plane with thermal vias placed directly under the package to spread out the heat dissipated by the ic. it is best if the copper plane is extended on either the top or bottom layer of the pcb to have the maximum exposure to air. internal ground layers do not dissipate thermals as much as top and bottom layer copper does. see the recommended layout as an example. input capacitor selection the input capacitor supplies the transient input current for the power inductor of the converter and must be placed and sized according to the transient current requirements. the switching frequency, output current and tolerable input voltage ripple are key inputs to estimating the capacitor value. an x7r type ceramic capacitor is usually the best choice since it has the least variation with temperature and dc bias. typically, boost and sepic converters re - quire a lower value capacitor than a buck mode converter. assuming that a 100 mv input voltage ripple is acceptable, the required capacitor value for a boost converter can be estimated as follows (t sw = 1/f osc ): c in (f) = i led (a) ? v led v in ? t sw (s) ? 1f a ? s ? 2.8 therefore, a 2.2 f capacitor is an appropriate selection for a 400khz boost regulator with 12v input, 48v output and 500ma load. with the same v in voltage ripple of less than 100mv, the input capacitor for a buck mode converter can be estimated as follows: c in (f) = i led (a) ? v led (v in ? v led ) v in 2 ? t sw (s) ? 10f a ? s a 10 f input capacitor is an appropriate selection for a 400khz buck mode converter with 24 v input, 12 v output and 1a load. in the buck mode configuration, the input capacitor has large pulsed currents due to the current returned through the schottky diode when the switch is off. it is important to place the capacitor as close as possible to the schottky diode and to the gnd return of the switch ( i.e ., the sense resistor). it is also important to consider the ripple current rating of the capacitor. for best reliability, this capacitor should have low esr and esl and have an adequate ripple current rat - ing. the rms input current for a buck mode led driver is: i in(rms) = i led ? (1Cd)d d = v led v in where d is the switch duty cycle. table 3. recommended ceramic capacitor manufacturers manufacturer web tdk www.tdk.com kemet www.kemet.com murata www.murata.com taiyo yuden www.t-yuden.com avx www.avx.com 3795fb LT3795
20 for more information www.linear.com/LT3795 output capacitor selection the selection of the output capacitor depends on the load and converter configuration, i.e ., step - up or step- down and the operating frequency. for led applications, the equivalent resistance of the led is typically low and the output filter capacitor should be sized to attenuate the current ripple. use of an x7r type ceramic capacitor is recommended. to achieve the same led ripple current, the required filter capacitor is larger in the boost and buck-boost mode ap - plications than that in the buck mode applications. lower operating frequencies will require proportionately higher capacitor values. the component values shown in the data sheet applications are appropriate to drive the specified led string. the product of the output capacitor and led string impedance decides the second dominant pole in the led current regulation loop. it is prudent to validate the power supply with the actual load (or loads). power mosfet selection for applications operating at high input or output voltages, the power n-channel mosfet switch is typically chosen for drain voltage v ds rating and low gate charge q g . consideration of switch on-resistance, r ds(on) , is usually secondary because switching losses dominate power loss . the intv cc regulator on the LT3795 has a fixed current limit to protect the ic from excessive power dissipation at high v in , so the mosfet should be chosen so that the product of q g at 7.7 v and switching frequency does not exceed the intv cc current limit. for driving leds, be careful to choose a switch with a v ds rating that exceeds the threshold set by the fb pin in case of an open load fault. several mosfet vendors are listed in table 4. the mosfets used in the application circuits in this data sheet have been found to work well with the LT3795. consult factory applications for other recommended mosfets. table 4. mosfet manufacturers vendor web vishay siliconix www.vishay.com fairchild www.fairchildsemi.com international rectifier www.irf.com infineon www.infineon.com high side pmos disconnect switch selection a high side pmos disconnect switch with a minimum v th of C1 v to C2 v is recommended in most LT3795 applica- tions to optimize or maximize the pw m dimming ratio and protect the led string from excessive heating during fault conditions as well. the pmos disconnect switch is typi- cally selected f or drain - source voltage v ds , and continuous drain current i d . for proper operations, v ds rating must exceed the open led regulation voltage set by the fb pin, and i d rating should be above i led . schottky rectifier selection the power schottky diode conducts current during the interval when the switch is turned off. select a diode rated for the maximum sw voltage. it is important to choose a schottky diode with sufficiently low leakage current when using the pwm feature for dimming, because leakage increases with temperature and occurs from the output during the pwm low interval. table 5 has some recom- mended component vendors. table 5. schottky rectifier manufacturers vendor web on semiconductor www.onsemi.com diodes, inc www.diodes.com central semiconductor www.centralsemi.com rohm semiconductor www.rohm.com sense resistor selection the resistor, r sense , between the source of the external n- channel mosfet and gnd should be selected to provide adequate switch current to drive the application without exceeding the 113mv ( typical) current limit threshold on the sense pin of the LT3795. for buck mode applications, select a resistor that gives a switch current at least 30% greater than the required led current. for buck mode, select a resistor according to: r sense(buck) 0.07v i led a pplica t ions i n f or m a t ion 3795fb LT3795
21 for more information www.linear.com/LT3795 a pplica t ions i n f or m a t ion for buck-boost mode, select a resistor according to: r sense(buck ? boost) v in ? 0.07v (v in + v led )i led for boost, select a resistor according to: r sense(boost) v in ? 0.07v v led ? i led the placement of r sense should be close to the source of the n-channel mosfet and gnd of the LT3795. the sense input to LT3795 should be a kelvin connection to the positive terminal of r sense . 70mv is used in the equations above to give some margin below the 113mv ( typical) sense current limit threshold. inductor selection the inductor used with the LT3795 should have a saturation current rating appropriate to the maximum switch current selected with the r sense resistor. choose an inductor value based on operating frequency and input and output voltage to provide a current mode signal on sense of ap - proximately 20 mv magnitude. the following equations are useful to estimate the inductor value (t sw = 1/f osc ): l buck = t sw ? r sense ? v led (v in ? v led ) v in ? 0.02v l buck ? boost = t sw ? r sense ? v led ? v in (v led + v in ) ? 0.02v l boost = t sw ? r sense ? v in (v led ? v in ) v led ? 0.02v table 6 provides some recommended inductor vendors. table 6. inductor manufacturers vendor web sumida www.sumida.com wrth elektronik www.we-online.com coiltronics www.cooperet.com vishay www.vishay.com coilcraft www.coilcraft.com loop compensation the LT3795 uses an internal transconductance error amplifier whose v c output compensates the control loop. the external inductor, output capacitor and the compen- sation resistor and capacitor determine the loop stability. the inductor and output capacitor are chosen based on performance, size and cost. the compensation resistor and capacitor at v c are selected to optimize control loop response and stability. for typical led applications, a 10nf compensation capacitor at v c is adequate, and a series resistor should always be used to increase the slew rate on the v c pin to maintain tighter regulation of led current during fast transients on the input supply to the converter. soft-start capacitor selection for many applications, it is important to minimize the inrush current at start-up. the built-in soft-start circuit significantly reduces the start-up current spike and output voltage overshoot. the soft-start interval is set by the soft-start capacitor selection according to the equation: t ss = c ss ? 2v 28a a typical value for the soft-start capacitor is 0.1 f. the soft-start pin reduces the oscillator frequency and the maximum current in the switch. soft-start also operates as fault protection, which forces the converter into hiccup or latchoff mode. detailed information is provided in the fault protection: hiccup mode and latchoff mode section. 3795fb LT3795
22 for more information www.linear.com/LT3795 a pplica t ions i n f or m a t ion fault protection: hiccup mode and latchoff mode if an led overcurrent condition, intv cc undervoltage, output short (fb 0.3 v), or thermal limit happens, the tg pin is pulled high to disconnect the led array from the power path, and the gate pin is driven low. if the soft-start pin is charging and still below 1.7 v, then it will continue to do so with a 28 a source. once above 1.7 v, the pull- up source is disabled and a 2.8 a pull-down is activated. while the ss pin is discharging, the gate is forced low. when the ss pin is discharged below 0.2 v, a new cycle is initiated. this is referred as hiccup mode operation. if the fault still exists when ss crosses below 0.2 v, then a full ss charge/discharge cycle has to complete before switching is enabled. if a resistor is placed between the v ref pin and ss pin to hold ss pin higher than 0.2 v during a fault, then the LT3795 will enter latchoff mode with gate pin low, and tg pin high. to exit latchoff mode, the en/uvlo pin must be toggled low to high. board layout the high speed operation of the LT3795 demands careful attention to board layout and component placement. the exposed pad of the package is the gnd terminal of the ic and is also important for thermal management of the ic. it is crucial to achieve a good electrical and thermal contact between the exposed pad and the ground plane of the board. to reduce electromagnetic interference ( emi), it is important to minimize the area of the high dv/dt switching node between the inductor, switch drain and anode of the schottky rectifier. use a ground plane under the switching node to eliminate interplane coupling to sensitive signals. the lengths of the high di/dt traces : 1) from the switch node through the switch and sense resistor to gnd, and 2) from the switch node through the schottky rectifier and filter capacitor to gnd should be minimized. the ground points of these two switching current traces should come to a common point then connect to the ground plane under the LT3795. likewise, the ground terminal of the bypass capacitor for the intv cc regulator should be placed near the gnd of the switching path. typically, this requirement results in the external switch being closest to the ic, along with the intv cc bypass capacitor. the ground for the compensation network and other dc control signals should be star connected to the underside of the ic. do not extensively route high impedance signals such as fb, rt and v c , as they may pick up switching noise. since there is a small variable dc input bias current to the isn and isp inputs, resistance in series with these pins should be minimized to avoid creating an offset in the current sense threshold. likewise, minimize resistance in series with the sense input to avoid changes ( most likely reduction) to the switch current limit threshold. figure 13 is a suggested two sided layout for a boost converter. note that the 4- layer layout is recommended for best performance. please contact the factory for the reference layout design. 3795fb LT3795
23 for more information www.linear.com/LT3795 figure 13. boost converter suggested layout component designations refer to page 23 circuit v in via x c in c in c in 3795 f13 vias to ground plane routing on the 2nd layer LT3795 2 3 1 4 5 6 7 8 9 10 11 12 13 14 21 20 22 19 18 17 16 15 26 27 28 23 24 25 m2 led + via from isp via from v in intv cc via gate via via from isn via from intv cc pwm via from tg x x x x x 29 x x x x x x x isp via isn via tg via m1 c4 c2 r insns r sns r3 r1 r2 r7 r8 r10 r5 r9 c c c1 r t c3 via from isp v ref via via from v ref c out c out c out c out c5 l1 d1 2 3 1 4 6 7 8 5 6 7 5 8 2 3 4 1 r led d2 r4 v in x x x x r c a pplica t ions i n f or m a t ion 3795fb LT3795
24 for more information www.linear.com/LT3795 typical a pplica t ions short-circuit robust boost led driver with input current limit and spread spectrum frequency modulation short led protection without r6: hiccup mode short led protection with r6: latchoff mode i m2 1a/div shortled 10v/div 3796 ta02b 50ms/div ss 2v/div led + 50v/div i m2 5a/div shortled 10v/div 3796 ta02c 50ms/div led + 50v/div ss 2v/div ivinp v in ivinn rt v c ivincomp ramp 87v led 400ma LT3795 3795 ta02a ctrl2 ovlo pwm pwm m1: infineon bsc190n12ns3g m2: vishay siliconix si7115dn l1: cooper hc9-220 d1: diodes inc pds5100 d2: vishay es1c led: cree xlamp xr-e v ref ss ctrl1 ismon led current reporting shortled openled shortled openled en/uvlo gnd fb isp isn tg intv cc intv cc intv cc gate sense c c 6.8nf l1 22h r insns 15m 8v to 60v 110v (transient) 63v ovlo d1 r t 31.6k 250khz r c 10k c3 6.8nf c5 4.7f c1 0.1f r7 100k r8 100k r1 499k 4a maximum r3 12.4k r2 115k c in 2.2f 3 100v v in c out 2.2f 4 100v r10 13.3k r sns 15m r led 620m m2 m1 d2 r6(opt) 402k r4 12.4k r5 ntc 10k r9 1m c4 10nf c2 0.1f ~1khz triangle spread spectrum modulation 3795fb LT3795
25 for more information www.linear.com/LT3795 typical a pplica t ions sepic led driver with input current limit efficiency v in (v) 0 75 100 3796 ta03b 10 20 4030 50 80 70 85 95 90 efficiency (%) ivinp v in ivinn rt v c ivincomp ramp 25v led LT3795 3795 ta03a ctrl1 ctrl2 ovlo pwm ismon pwm led current reporting v ref en/uvlo gnd fb isp isn tg intv cc intv cc gate sense c c 10nf l1a 22h r insns 20m 8v to 60v d1 c3 10nf r t 19.6k 400khz r c 4.99k c4 4.7f c6 6.8nf c1 0.1f c2 0.1f r1 499k r3 12.4k r2 115k c in 2.2f 3 100v v in c out 10f 3 35v r8 40.2k c5 2.2f 100v 2 r sns 15m r led 250m m2 1a 3a maximum m1 l1b r4(opt) 402k r7 1m ss shortled openled shortled openled intv cc r5 100k r6 100k r9 0 option for disabling ssfm m1: infineon bsc160n10ns3g m2: vishay siliconix si7415dn l1: coiltronics drq127-220 d1: diodes inc pds5100 led: cree xlamp xr-e 3795fb LT3795
26 for more information www.linear.com/LT3795 buck mode led driver typical a pplica t ions v in (v) 20 75 100 3796 ta04b 30 40 50 7060 80 80 70 85 95 90 efficiency (%) efficiency ivinp v in ivinn rt v c ramp ss 18v led 2.5a LT3795 3795 ta04a ctrl1 ctrl2 ovlo pwm pwm led current reporting m1: vishay siliconix si7454dp m2: vishay siliconix si7113dn d1: diodes inc pds3100 l1: coiltronics hc9-220 led: cree xlamp xm-l q1: zetex fmmt593 v ref ivincomp ismon en/uvlo tg fb sense gnd gate intv cc isp isn c c 4.7nf r insns 50m c in 0.47f 100v r led 100m intv cc d1 r t 19.6k 400khz r c 10k c4 4.7f c3 0.1f c7 6.8nf c2 10nf r1 499k r3 8.06k r2 21.5k 24v to 80v v in c6 2.2f 3 100v r9 10k l1 22h r sns 15m m1 m2 r5 178k c5 10f 2 25v r8 100k r7 1m c1 0.1f shortled openled shortled openled intv cc r4 100k r5 100k q1 1.2a maximum r10 0 option for disabling ssfm 3795fb LT3795
27 for more information www.linear.com/LT3795 buck mode led driver with 3000:1 pwm dimming typical a pplica t ions 3000:1 pwm dimming at 100hz and v in = 24v i led 1a/div 3796 ta05b 1s/div i l 1a/div pwm 2v/div ivinpv in ivinn rt v c ramp ss 8v led 1a LT3795 3795 ta05a ctrl1 ctrl2 ovlo pwm pwm led current reporting m1: vishay siliconix si4840bdy m2: vishay siliconix si7415dn d1: zetex zlls2000ta l1: wrth 744066100 led: cree xlamp xr-e q1: zetex fmmt591 v ref ivincomp ismon en/uvlo tg fb sense gnd gate intv cc isp isn c c 4.7nf r insns 50m r led 250m d1 r t 6.65k 1mhz r c 10k c4 4.7f c2 10nf c1 0.1f r1 499k r3 17.4k r2 26.1k 16v to 25v v in c6 2.2f 3 50v r9 10k l1 10h r sns 33m intv cc m1 m2 r6 100k c5 10f 2 25v r8 100k r10 1m c3 0.1f shortled openled shortled openled intv cc r4 100k r5 100k c in 0.47f 1.2a maximum 3795fb LT3795
28 for more information www.linear.com/LT3795 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. fe28 (ea) tssop rev k 0913 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 3 4 5 6 7 8 9 10 11 12 13 14 192022 21 151618 17 9.60 ? 9.80* (.378 ? .386) 7.56 (.298) 3.05 (.120) 28 2726 25 24 23 1.20 (.047) max 0.05 ? 0.15 (.002 ? .006) 0.65 (.0256) bsc 0.195 ? 0.30 (.0077 ? .0118) typ 2 recommended solder pad layout exposed pad heat sink on bottom of package 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 7.56 (.298) 3.05 (.120) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 28-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663 rev k) exposed pad variation ea fe package 28-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663 rev k) exposed pad variation ea 3795fb LT3795
29 for more information www.linear.com/LT3795 r evision h is t ory rev date description page number a 03/14 clarified spread spectrum description and figure 10 clarified schematic, graphs 17 24, 25, 26, 30 b 05/14 clarified typical application schematic. clarified the electrical characteristics section. clarified the typical application schematic. 1 2, 3, 4 30 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 3795fb LT3795
30 for more information www.linear.com/LT3795 r ela t e d p ar t s typical a pplica t ion buck-boost mode led driver efficiency vs v in v in (v) 100 3796 ta07b 0 10 20 30 40 50 80 75 70 85 90 95 efficiency (%) pwm = v ref ivinp v in ivinn en/uvlo rt v c ss 36v led 1a LT3795 3795 ta07a ctrl2 ctrl1 pwm pwm led current reporting v ref ismon ivincomp ovlo gnd fb isp isn tg intv cc gate sense r c 4.99k r t 19.6k 400khz l1 22h d1 led - led ? led - r insns 20m 8v to 50v c c 10nf c4 4.7f c2 22nf c1 0.1f r1 499k c in 4.7f 50v r3 14.3k r2 90.9k v in c5 1f 100v r7 10k r sns 15m r led 250m intv cc m2 m1 q1 r6 357k v in c out 2.2f 4 50v m1: vishay siliconix si7454dp m2: vishay siliconix si7113dn l1: cooper hc9-220 d1: diodes inc pds5100 q1: zetex fmmt593 led: cree xlamp xr-e c3 0.1f c6 6.8nf shortled openled shortled openled intv cc r4 100k r5 100k 3a maximum ramp r8 0 option for disabling ssfm part number description comments lt3791 60v, synchronous buck-boost 1mhz led controller v in : 4.7v to 60v, v out range: 0v to 60v, true color pwm , analog = 100:1, i sd < 1a, tssop-38e package lt3796/lt3796-1 100v constant current and constant voltage controller with dual current sense v in : 6v to 100v, v out(max) = 100v, true color pwm dimming = 3000:1, i sd < 1a, 28-lead tssop package lt 3755/lt3755-1/ lt3755-2 high side 60v, 1mhz led controller with t rue color 3,000:1 pwm dimming v in : 4.5v to 40v, v out range: 5v to 60v, true color pwm , analog = 3000:1, i sd < 1a, 3mm 3mm qfn-16, msop-16e packages lt3756/lt3756-1/ lt3756-2 high side 100v, 1mhz led controller with true color 3,000:1 pwm dimming v in : 6v to 100v, v out range: 5v to 100v, true color pwm , analog = 3000:1, i sd < 1a, 3mm 3mm qfn-16, msop-16e packages lt3743 synchronous step-down 20a led driver with three-state led current control v in : 5.5v to 36v, v out range: 5.5v to 35v, true color pwm , analog = 3000:1, i sd < 1a, 4mm 5mm qfn-28, tssop-28e packages lt3517 1.3a, 2.5mhz high current led driver with 3,000:1 dimming v in : 3v to 30v, true color pwm , analog = 3000:1, i sd < 1a, 4mm 4mm qfn-16 package lt3518 2.3a, 2.5mhz high current led driver with 3,000:1 dimming v in : 3v to 30v, true color pwm , analog = 3000:1, i sd < 1a, 4mm 4mm qfn-16 package lt3474/lt3474-1 36v, 1a (i led ), 2mhz, step-down led driver v in : 4v to 36v, v out range = 13.5v, true color pwm = 400:1, i sd < 1a, tssop-16e package lt3475/lt3475-1 dual 1.5a(i led ), 36v, 2mhz, step-down led driver v in : 4v to 36v, v out range = 13.5v, true color pwm , analog = 3000:1, i sd < 1a, tssop-20e package linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT3795 ? linear technology corporation 2013 lt 0514 rev b ? printed in usa 3795fb LT3795

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